In many control applications, it is necessary to convert a digital signal, such as the output of a computer or sensor, to an analog equivalent, in order to effect control. The analog signal is typically a voltage which corresponds to the value of the digital word. In many such applications, the size of the digital words required is greater than the range available in high accuracy, commercially available digital-to-analog converters (DACs). The cost of DACs dramatically increases as the range increases from 12 to 16 and even 18 and 22 bit performance. Additionally, converters of this range do not typically have high accuracy and high speed. The speed at which a DAC converts digital words to analog signals is also known as its data rate or bit rate and these terms are hereinafter used interchangeably. The data rates are limited because errors in the DAC analog signal occur when switching from one digital word to another. The time within which these errors settle is a primary factor which determines the DAC data rate. Several schemes have attempted to address the cost and performance problems by combining at least two digital-to-analog converters, one to process the most significant bits of the digital word and one to process the least significant bits. For example, in a 16-bit DAC application, one DAC might process bits corresponding to the range 2.sup.0 to 2.sup.7 while a second DAC might process bits corresponding to the range 2.sup.8 to 2.sup.16. The voltages representing these converted bits are then combined using appropriate voltage dividers, such as resistor networks, to properly weigh the contribution of each set of bits to the overall analog value. This combined voltage corresponds to the value of the digital word.
In Gumm, U.S. Pat. No. 4,410,879, two limited resolution DACs are cascaded in such a manner that one converts the lower order bits of a digital input signal and the other converts the higher order bits. A successive approximation technique is used to reset the lower order DAC. The apparatus of Gumm provides a higher range than would the use of a single DAC, but it does not provide greater accuracy or a higher data rate than would using each of the DACs individually.
Altman, U.S. Pat. No. 4,544,911, combines two DACs to provide a large range with a high degree of monotonicity, high resolution, and many steps. An output error results when the higher order DAC is switched up and the lower order DAC is switched down, due to the lower order DAC range being purposefully adjusted by a resistor divider to be greater than a single higher order DAC step. Such output errors due to switching are known as glitches. This glitch is corrected by rapidly cycling the lower order DAC so that the combined output of the two DACs is equal to the pre-switching output and smoothing the glitch with a low-pass filter. Altman provides a high range with many increments but does not provide a higher degree of accuracy than would the use of individual DACs. Altman also does not provide an operating speed which is greater than that provided by the use of individual DACs.
Hareyama, U.S. Pat. No. 4,503,421, discloses breaking an input digital signal into blocks of significant bits from the most significant bits to the least significant bits. The conversions from digital to analog are performed on each of those blocks before summing the analog signals. Hareyama provides an internal correction to increase the accuracy of the overall conversion process but does not use individual DAC components having differing accuracies and data rates.
Sandford, U.S. Pat. No. 3,967,272, breaks an input digital word into blocks composed of most significant bits and least significant bits and then successively performs digital-to-analog conversions of those blocks with a single DAC. In doing so, Sandford saves at least one converter chip at the sacrifice of system speed.
Van de Plassche, U.S. Pat. No. 4,573,005, discloses a DAC in which the input digital signal is broken into blocks, each block converted and the analog signals resulting from the individual conversions having an error-correction scheme applied to them prior to summation.
In Weigand, U.S. Pat. No. 4,430,642, an apparatus is disclosed in which a number of identical DACs are operated such that the ultimate analog output of the coupled DACs is a composite result of the digital inputs. Weigand minimizes the error in the conversion of the digital-to-analog signals by decreasing the effect of the transition of the more significant bits in the converter apparatus. Weigand does not, however, disclose the overall accuracy and data rate of the converter being greater than one of its constituent components.
As can be seen from the above references, the prior art discusses many schemes of breaking digital input words into blocks and operating on those blocks separately. It does not disclose a scheme in which input digital words of very large ranges can be operated on with a high data rate and with high accuracy.